Inomize Selected Synopsys’ 56G Ethernet PHY IP
23 March, 2020
The DesignWare suite will be used for the development of its high-performance computing, software-defined radio (SDR) and communications System-on-Chip
Synopsys announced that Inomize from Israel selected its DesignWare® 56G Ethernet PHY IP, for the development of its high-performance computing, software-defined radio (SDR), and power-efficient communications System-on-Chip (SoC). Inomize is using Synopsys’ PHY IP for the design of transmitter and receiver architecture, and to ensure robust operation in harsh conditions. The DesignWare 56G Ethernet PHY is available now in 16/12/7-nm FinFET processes.
Established in 2007, Inomize is an ASIC design company, with R&D offices both in Israel and the UK. It provides Analog, Digital and Mix Signal ASIC, FPGA and complete systems design services. Last year it was selected by HP Indigo to develop an ASIC solution for their next generation of high-resolution industrial presses.
Inomize is also a member in the TSMC Value Chain Aggregator (VCA) program. A VCA member is an independent ASIC design service company working closely with TSMC to assist system companies, ASIC and emerging start-up companies to bring their innovation to production.
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