IBM brings Phase Change Memory Technology closer to the market

20 May, 2016

IBM announced success in building a 3 bits per cell memory chip based on the surprising Phase Change Technology. The new technology promises to be much faster - and cheaper- than the current memory technologies

IBM announced success in building a 3 bits per cell memory chip based on the surprising Phase Change Technology. The new technology promises to be much faster – and cheaper-  than the current memory technologies1

IBM scientists have announced a major breakthrough in Phase Change technology. PCM is not a new technology, it is a type of non-optical storage that works by manipulating the behavior of chalcogenide glass, which is how data is stored on re-writeable Blue-ray discs. An electrical current is applied to change PCM cells from an amorphous to crystalline structure, allowing to store “zeros” and “ones” in either state while the application of low voltage can read the data back.

Up until now, PCM technology was limited by the ability to store no more than 2 Bits of data per cell. This has now changed to 3 bits. “Reaching 3 bits per cell is a significant milestone because at this density the cost of PCM will be significantly less than DRAM and closer to flash” says Dr. Haris Pozidis, the manager of non-volatile memory research at IBM Research – Zurich.

Vast commercial possibilities

The new technology could have immense commercial value as it offers a cheap and very fast alternative to exiting storage technologies such as Flash and DRAM. IBM envisions standalone PCM as well as hybrid applications, which combine PCM and flash storage together, with PCM as an extremely fast cache.

For example, a mobile phone’s operating system could be stored in PCM, enabling the phone to launch in a few seconds. In the enterprise space, entire databases could be stored in PCM for blazing fast query processing for time-critical online applications, such as financial transactions.

Machine learning algorithms using large datasets will also see a speed boost by reducing the latency overhead when reading the data between iterations. To achieve multi-bit storage IBM scientists have developed two innovative enabling technologies: a set of drift-immune cell-state metrics and drift-tolerant coding and detection schemes.

Novel coding provide robustness

More specifically, the new cell-state metrics measure a physical property of the PCM cell that remains stable over time, and are thus insensitive to drift, which affects the stability of the cell’s electrical conductivity with time. To provide additional robustness of the stored data in a cell over ambient temperature fluctuations a novel coding and detection scheme is employed. This scheme adaptively modifies the level thresholds that are used to detect the cell’s stored data so that they follow variations due to temperature change. As a result, the cell state can be read reliably over long time periods after the memory is programmed, thus offering non-volatility.

The experimental multi-bit PCM chip used by IBM scientists is connected to a standard integrated circuit board. The chip consists of a 2 × 2 Mcell array with a 4- bank interleaved architecture. The memory array size is 2 × 1000 μm × 800 μm. The PCM cells are based on doped-chalcogenide alloy and were integrated into the prototype chip serving as a characterization vehicle in 90 nm CMOS baseline technology.

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