Exclusive: Israeli Rocketick will help to develop Cadence’s new simulation engine

28 July, 2016

Cadence acquired the Rocketick in April this year. This Israeli team found a way to split the design of the simulation activity with multiple processors working in parallel

Cadence acquired the Rocketick in April this year. This Israeli team found a way to split the design of the simulation activity with multiple processors working in parallel

Dr. Anirudh Devgan

Israeli company Rocketick will develop a simulation engine within Cadence worldwide. This has been told to Techtime by Senior VP at Cadence and General Manager of the Verification group, Dr. Anirudh Devgan. The new simulation engine will replace the current generation Incisive systems.

As a reminder, in April this year Cadence has acquired the Rocketick company then based in Ramat Gan. The company has developed an extraordinary ability to perform the activities of the simulation in parallel by multiple processors, while using a single processor.


Chip design is usually performed using Verilog language, which is a Hardware Description Language, the most widely used in the industry. This language describes the relationships and dependencies between the various hardware components that make up the chip. After the planning, it is necessary to perform a simulation using a powerful computer that is running the program,  making sure there are no planning mistakes.

The problem is that running this simulator can last for many days. The technology that Rocketick has developed receives a chip inscribed by HDL language, analyzes the interdependencies of the various processes inside it, and extracts the planning process with a relatively low dependency, which can then run in parallel. The result is a dramatic acceleration of authentication: up to 6 RTL checks, up to 10 gate-level functional testing to 30 times during the imaging component test systems – and this with an x86 processor core 64.

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Cadence estimated the deal will end in the second quarter of 2016. The forecast was accurate: A week ago, 25 employees from Rocketick joined the Cadence Petah Tikva offices. According to Devgan, this is an exciting technology that is a paradigm shift in chip design verification.

Devgan: “Today all the simulators are working only with one core because it is very difficult to create multiple process simulations, and no company has not been able to do that. So when companies are developing new simulators, they show an improvement of a few tens of percent speed in the simulations.”

Why is it difficult to parallel the simulation?

“When you do a simulation on a number of ports/gates, you find that at any given moment there is another gate operation, and therefore it is very difficult to divide the work between a number of separate processors in advance. And Rocketick has found a way to do it.”

Dr. Anirudh Devgan is one of the most senior managers at Cadence Design Systems Inc. He Is the director of two major product groups in society: Digital & Signoff Group and System & Verification Group.

Devgan is an expert in the field of chips. Prior to joining Cadence in 2012, he managed the company Magma Design Automation (sold to Synopsys in 2012), before that he worked 12 years in IBM Research, and registered 27 patents in his name. He said that Israel is a center of excellence in the Cadence Verification field. “We feel very good with the research that we have here. Israel has always brought new ideas in this field, ever since we acquired Verisity in 2006”.

What are the main trends in the semiconductor market today?

“The biggest trend that I see is that big system companies want to produce their own main chips. This enables us to provide products with a greater emphasis on overall system considerations. We see this trend in the field of mobile phones and automotive field. System companies want to get closer to silicon. Amazon, for example, acquired the Israeli Annapurna, and Samsung is developing its own chips. The Automotive trend is accelerated by the transition of automotive technologies 45 nm and 65 nm, to the production of 16-nano meter technology. This is a great opportunity for us. “

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