Tower and Juniper Announced SiPho with III-V Lasers
27 December, 2021
Process design kits (PDK) are expected to be available by year end and the first open multi-project wafer (MPW) run are expected to be offered early next year
Tower Semiconductor and Juniper Networks announced the first silicon photonics (SiPho) foundry-ready process with integrated III-V lasers, amplifiers modulators and detectors. Th process addresses optical connectivity in datacenters and telecom networks, and new emerging applications such as artificial intelligence and LiDAR sensors. The new platform co-integrates III-V lasers, semiconductor optical amplifiers (SOA), electro-absorption modulators (EAM) and photodetectors with silicon photonics devices, on a single chip.
“Our mutual development work with Tower has been extraordinarily successful in qualifying this innovative silicon photonics technology in a high-volume manufacturing facility,” said Rami Rahim, CEO of Juniper Networks. The new process will be available to customers via Tower’s foundry services. Process design kits (PDK) are expected to be available by year end and the first open multi-project wafer (MPW) run are expected to be offered early next year.
Tower’s Multi-Project Wafer (MPW) Shuttle Program enables customers to tape-out their designs for rapid prototyping and helps reduce costs by sharing the expense of masks and wafers with other MPW shuttle program participants. This can all be done using Tower Semiconductor’s standard manufacturing process technologies. First samples of full 400Gb/s and 800Gb/s PICs reference designs with integrated laser are expected to be available in Q2 of 2022.
Posted in tags: semiconductors