semiconductors

Silicon Photonics Transforms Tower’s Business Model

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Tower Semiconductor reported record revenue of $526 million in the third quarter of 2026, representing 33% growth compared with the same quarter in 2025. Gross profit nearly doubled, reaching a record $179 million, up 92% from $93 million in Q3-2025. Operating profit reached a record $127 million (excluding non-recurring items) – 2.5 times the $51 million reported in the corresponding quarter last year. The company provided revenue guidance of $600 million for the fourth quarter of 2026, representing 36% year-over-year growth.

Tower’s CEO Russell Ellwanger said the company is entering the strongest growth phase in its history. “We expect to close 2026 with approximately $2 billion in annual revenue.” According to Ellwanger, the company is reaching an annualized revenue run rate of $2.4 billion, assuming quarterly sales in 2027 remain at least at the level projected for Q4-2026. “We aim to enter 2027 without the typical first-quarter seasonality decline, experienced by the industry. We already have clear visibility into continued sequential revenue growth.”

 

Tower’s New Growth Engine

Ellwanger explained that strong demand for silicon photonics (SiPho) and silicon germanium (SiGe) technologies is driving “exceptional growth” in the company’s high-speed connectivity business. “We are targeting an annualized revenue run rate of $1.1 billion from SiPho alone in the fourth quarter, five times our annual SiPho revenue in 2025.” In effect, this implies quarterly silicon photonics revenue of approximately $275 million in the final quarter of 2026, accounting for about 45.8% of Tower’s total revenue.

Tower is already close to achieving this target. During Monday’s earnings conference call with analysts, Ellwanger revealed that silicon photonics revenue had already reached approximately $240 million in the third quarter, representing 45.6% of total sales. This suggests that Tower is gradually evolving from a specialized analog semiconductor foundry into a strategic manufacturing partner for the optical communications industry in the AI era, without abandoning its traditional businesses.

The transformation could also have implications for the company’s valuation. If investors become convinced that SiPho demand represents a long-term structural trend rather than a temporary investment cycle, they may increasingly view Tower less as a traditional cyclical semiconductor manufacturer and more as a technology supplier positioned for sustained growth.

On the other hand, this shift could weaken one of Tower’s traditional strengths: its diversification across multiple end markets. As silicon photonics becomes a larger part of its business, the company is becoming increasingly exposed to AI infrastructure investment cycles and the optical communications market.

The transition is taking place gradually. Ellwanger explained: “Our ongoing investments in manufacturing capacity expansion, including the previously announced Track-1 project to expand 300mm wafer manufacturing capacity in Japan, are progressing ahead of schedule. These investments are supported by customer contracts extending through 2029, giving us strong confidence in our ability to achieve our 2028 revenue and margin targets.”

Ellwanger was apparently referring to the company’s announcement in May 2026, when Tower reported that it had secured approximately $1.3 billion in contracts from major customers for SiPho product deliveries in 2027. The company also received approximately $290 million in customer prepayments to reserve manufacturing capacity.

Intel Cancels Manufacturing deal With Tower Semiconductor

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photo above: Intel’s Fab 11 facility where Tower’s chips were manufactured. Photo: Intel

Intel has withdrawn from its joint manufacturing agreement with Tower Semiconductor at Intel’s Fab 11X chip manufacturing facility in New Mexico, USA. Following the cancellation, the two companies entered arbitration proceedings. Tower has begun transferring customer production from Intel’s facility to its own Fab7 plant in Japan. The development was disclosed in a brief note at the end of Tower’s quarterly report released yesterday.

The manufacturing agreement was signed in September 2023, about three weeks after Intel’s planned acquisition of Tower was terminated. The deal allowed Intel to utilize a largely idle factory producing older-generation technologies. At the time, Intel Foundry Services (IFS) senior executive Stuart Pann said Tower’s investment would enable the equipment to be activated while Intel provided manufacturing services at the site.

Under the agreement, Tower committed to invest approximately $300 million to transfer processes and install production equipment, which would remain its property. In return, IFS would provide manufacturing services for power devices and RF SOI wireless solutions at volumes exceeding 60,000 wafers per month. For Tower, the deal provided significant capacity without building a new fab, using 300mm wafers that offer lower overhead and higher profitability.

Tower now says it transferred manufacturing processes originally developed at its Fab7 facility in Japan to New Mexico, qualified them and began serving customers. The company is currently moving those customers back to Fab7 in order to maintain supply continuity and service levels.

Record 2025 revenue

In the fourth quarter of 2025, Tower’s revenue grew about 14% year over year to approximately $440 million. Full-year 2025 revenue reached a record $1.57 billion, representing 9% growth compared with $1.44 billion in 2024. The company expects first-quarter 2026 revenue of about $412 million, roughly 15% growth year over year.

While the global semiconductor market expanded by more than 26% during this period, the primary growth driver was large advanced-node chips for data centers and AI — areas outside Tower’s core business.

Nearly $1 billion investment in capacity expansion

Tower is currently expanding manufacturing infrastructure for silicon photonics (SiPho) and silicon-germanium (SiGe) components, key technologies for communications and high-frequency RF applications. The company recently added another $270 million to the project, bringing total investment to about $920 million.

The goal is to complete installation and qualification by the fourth quarter of 2026 and begin full mass production in 2027. The project is expected to increase SiGe and SiPho production capacity fivefold compared with the fourth quarter of 2025.

Tower’s improving performance has been reflected in its stock price over the past year. The company now trades at roughly $140 per share on Nasdaq, compared with less than $50 a year ago. Even the dispute with Intel has not shaken the stock, which currently values Tower at about $15.1 billion.

Israel’s Two-Engines Model

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The nonprofit organization Startup Nation Central, has released Israel’s Semiconductor Landscape 2025, a report and interactive map revealing the “Two-Engine Paradox” powering Israel’s chip sector. Combining multinational R&D centers and agile startups, Israel has become a global hub for semiconductor R&D and design, developing core technologies that fuel the world’s AI and computing infrastructure.

Based on data from the Startup Nation Finder business engagement platform, the report outlines Israel’s “two-engine” model combining high-impact startups with multinational R&D hubs to drive core chip innovation for the world’s leading technology companies. Israeli teams design central technologies such as Intel’s Gaudi AI processors, Amazon’s Graviton CPUs and Nitro networking systems, and Nvidia’s data center interconnects.

“Israel’s semiconductor ecosystem has evolved into a global R&D powerhouse,” said Avi Hasson, CEO of Startup Nation Central. “Our engineers design the chips that power AI, cloud infrastructure, and defense systems. The next step is to grow companies that scale independently rather than sell early.”

Ratio of 1:5 compared with the US

Over the past decade, for every $5 invested in US semiconductor startups, $1 was invested in Israeli companies, a ratio of 1:5, compared to the overall 1:15 ratio between Israeli and U.S. VC investment volumes. This remarkable figure highlights the strategic weight of Israel’s chip sector and its strong alignment with global capital trends.

The report identifies more than 250 active semiconductor companies, representing about 3.5% of Israel’s technology ecosystem. While the number of firms has grown 16% over the past decade, the sector is entering a phase of consolidation, with activity shifting from rapid expansion to stable, capital-intensive growth.

Funding remains resilient. Following a record $1.2 billion raised in 2021, annual private investment has stabilized at $0.4–0.5 billion. Median round sizes are two to four times higher than the national tech average, reaching $35 million in 2025, supported by major financings such as Quantum Machines ($170M) and Retym ($75M).

No more “Fast Exits”

M&A continues to define the sector’s global integration. Key deals include Intel’s $15.3B purchase of Mobileye, Nvidia’s $6.9B acquisition of Mellanox, and KLA’s $3.4B acquisition of Orbotech, embedding Israeli innovation into the global supply chain. The industry is estimated to employ about 45,000 people (9% of Israel’s tech workforce). The biggest employers are Intel with 9,300 employees and Nvidia with 5,500 employees.

Unlike Israel’s software sector, semiconductor facilities are spread nationwide, supporting both regional growth and workforce diversity.  “The ecosystem’s reliance on exits, combined with high operational costs, has slowed new startup formation,” said Yariv Lotan, VP of Product and Data at Startup Nation Central. “Its central challenge now is to evolve from a ‘build to exit’ mindset toward a ‘build to last’ model.”

More information: 2025 Semiconductor Landscape Map and full report on Startup Nation Finder

RAAAM aims to extend Moore’s Law to memory: moving toward 2nm qualification at TSMC

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[In the photo above: RAAAM management team (left to right): Adam Teman, Eli Lizerovitz, Robert Gitterman, Alex Fish, and Eran Rotem. Photo: Omer Cohen]

RAAAM Memory Technologies, an Israeli–Swiss semiconductor startup, is entering a critical stage in the commercialization of its on-chip memory technology, GCRAM, following the completion of a $17.5 million Series A round led by NXP Semiconductors. CEO and co-founder Dr. Robert Gitterman says the new funding will support the qualification of a 256-MB test chip in TSMC’s 2-nanometer process — the final step before mass production.

“Our technology has already been proven on silicon,” Gitterman told Techtime. “We’re now fabricating the 2 nm qualification chip, which will undergo a series of stringent tests. Once we pass qualification, any company designing chips in this process — including Apple, NVIDIA, and others — will be able to integrate our memory as a drop-in SRAM replacement.”

The memory bottleneck

According to Gitterman, roughly 50 percent of every digital chip’s area is devoted to memory, mostly SRAM. While processors continue to scale with each generation, SRAM has reached the physical limits of miniaturization in advanced CMOS nodes below 5 nm. “Moore’s Law has stopped at memory,” he says. “SRAM has become the bottleneck of the AI era. Once it runs out of space, designers have to move to external memories like HBM — which are slower and far more power-hungry.”

The surge in memory demand for AI accelerators, autonomous vehicles, and edge devices has created a pressing need for denser, more efficient on-chip memory. RAAAM’s GCRAM targets exactly that: a seamless SRAM replacement suitable for CPUs, GPUs, and low-power SoCs alike.

Three transistors and a smart refresh

RAAAM’s innovation lies not in exotic materials or transistor geometry, but in circuit-level architecture. Each GCRAM cell uses three transistors instead of six, relying on charge-retention capacitive storage with a background refresh mechanism.
“The real breakthrough is in the refresh logic we developed,” Gitterman explains. “It operates in the background without interfering with system performance. This lets us maintain high speed while solving the yield problems that plague advanced SRAM.”

The company has demonstrated GCRAM across multiple foundry nodes — from 180 nm down to 5 nm FinFET — achieving 2× density and 10× lower power than conventional SRAM, all while remaining fully compatible with standard CMOS flows.

From academic research to commercialization

Founded in 2021 by four researchers — Dr. Robert Gitterman, Prof. Andreas Burg, Prof. Alexander Fish, and Prof. Adam Teman — RAAAM grew out of nearly a decade of collaborative research between Bar-Ilan University and EPFL Switzerland.
“None of us had prior startup experience,” Gitterman recalls. “We had to learn how to build a company from scratch. But the timing was perfect — the industry was hungry for new memory solutions, and our technology was ready.”

He admits the shift from academia to semiconductors was a reality check. “In academia you have time. In this industry, you have to move at the pace of process generations — sometimes every year. If you don’t keep up, you’re out of the game.”

Strategic backing from NXP

NXP, which led the Series A, has been working with RAAAM for several years and views GCRAM as a strategic technology. “RAAAM’s solution directly addresses one of the most critical challenges in advanced chip design,” said Victor Wang, VP of Front-End Innovation at NXP. “We’ve seen its potential firsthand.”

Alongside NXP, RAAAM is also collaborating with a major networking-chip manufacturer and with GlobalFoundries on additional process integrations.

The company currently employs 22 people, operating from Petah Tikva and Lausanne. Gitterman describes the new funding as “the first major step toward full commercialization” and a sign that the semiconductor industry is again open to genuine innovation.
If RAAAM’s qualification succeeds, its memory could soon find its way into the processors powering the next generation of artificial intelligence.

China Discovered a Breach in US Tech Sanctions

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At the recent RISC-V Summit held in China two weeks ago, a surprising fact came to light: China has rapidly emerged as a global RISC-V powerhouse, playing a decisive role in the future of this open computing architecture. Over 4,000 participants from around the world attended the summit, most of them living in mainland China.

A review of the professional committees within the RISC-V International Foundation revealed that Chinese representatives now hold key positions. They are chairing major technical groups such as the AI/ML SIG, Android SIG, Datacenter SIG, and Platform Management Interface, and serving as vice-chairs in numerous others.

This is no coincidence: The Chinese government has been quietly orchestrating a broad strategic initiative aimed to steer its domestic semiconductor industry toward global leadership in open RISC-V architectures, and positioning it as a viable alternative to proprietary CPU platforms such as Intel’s x86 and Arm’s architecture.

Technology Cold War

For nearly two decades, China has been engaged in what can be called a Technology Cold War with the U.S. and its allies over the dominance of the Global semiconductor’s market. That conflict has hampered China’s national goal first drafted in 2010 –  to become a fully self-reliant chip superpower by 2025.

Now, a new opportunity is emerging. According to a Reuters, China plans to issue guidance to encourage the use of open-source RISC-V chips nationwide, to curb the country’s dependence on Western-owned technology. Beijing’s new directive will accelerate domestic adoption of the RISC-V instruction set architecture (ISA) and make in a corner stone in its policy of technology independence.

These new ideas, including substantial financial incentives, were crafted by a cross-ministerial task force comprising eight government bodies, including the Cyberspace Administration of China, the Ministry of Industry and Information Technology, the Ministry of Science and Technology, and the China National Intellectual Property Administration.

The Rise of Open Source Silicon

RISC-V was born 15 years ago at the University of California, Berkeley, as an open-source ISA capable of supporting high-performance computing with word lengths of up to 128 bits. It was intended to be an efficient and cost-effective alternative to proprietary, commercial ISAs. Since then, RISC-V has matured into a fast-growing global ecosystem.

The SHD Group: Total RISC-V SoC Regional Revenues 2021-2030

According to The SHD Group, global revenues from RISC-V-based chips reached $123 million in 2023. By 2030, that number is projected to grow at a CAGR of 39%, reaching $92 billion with over 16.5 billion SoC units that will be shipped. By that year, the largest application segment for RISC-V is expected to be AI acceleration, with consumer electronics as the biggest end market, and automotive—a key strategic sector for China—as the leading industrial growth engine.

Will China Flip the sanctions narrative on its head

If current projections hold, China is poised to become the world’s leading supplier of RISC-V solutions by 2030. But the figures from SHD Group predate the new policy initiative and likely underestimate its long-term significance.

China’s strategy isn’t just about dominating RISC-V chips; it’s about building an elite semiconductor ecosystem based on RISC-V, complete with native support for NPU, CPU, and GPU designs, and a vertically integrated software development stack. This echoes a past attempt to revive PowerPC, which ultimately failed, but the momentum behind RISC-V appears far more formidable.

The outcome could reshape Global supply dynamics. While Western nations have poured massive investments into cutting-edge sub-10nm process nodes, no electronic system is complete without supporting chips fabricated on mature process nodes like 28nm, 65nm, or even 130nm, and this is an area where China remains a manufacturing powerhouse.

In other words, if China’s RISC-V push brings advanced design capabilities in-house, it may gain leverage not just as a consumer of technology—but as a strategic supplier. Ironically, China could eventually restrict exports of legacy-node components critical to Western tech ecosystems, flipping the sanctions narrative on its head.

Tower Semiconductor Withdraws from $10 Billion Chip Plant Project in India

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Tower Semiconductor, based in Migdal HaEmek, Israel, has withdrawn from a long-standing partnership that competed over the past 13 years in a $10 billion public-private initiative to establish a semiconductor fabrication plant in India. During a conference call following the release of its financial results this week, the company stated it had decided to exit the project “for good reasons,” without elaborating further. The project had been in motion for years, beginning with the Indian government’s strategic push to build a local semiconductor industry. In 2013, Tower’s proposal was selected by the Indian authorities, but progress remained sluggish and no final decision on funding was ever made.

By the end of 2024, the project appeared to gain traction with all necessary approvals in place, aiming to build a facility employing around 5,000 people and reaching a monthly production capacity of 80,000 silicon wafers. Tower was slated to be the technology partner, providing manufacturing process expertise and operational know-how. However, once again, the initiative stalled. Two weeks ago, Reuters reported that Tower’s main partner in the venture, India’s Adani Group, had ceased all negotiations with Tower, citing economic impracticality due to lower-than-expected local demand.

Other sources told Reuters that Adani was also dissatisfied with the scale of Tower’s financial commitment to the project. Tower CEO Russell Ellwanger noted, in response to a question, that the company had made the independent decision to withdraw from the project about six months ago but chose not to issue a formal press release at the time.

Strong Q1 Performance and Growth Outlook

Despite the setback in India, Tower posted encouraging results for the first quarter of 2025. Revenue increased by approximately 9% year-over-year, reaching around $358 million. The company also issued a positive growth outlook for the remainder of the year, particularly in the second half, driven by capacity expansion investments—primarily in its joint ventures with Intel and STMicroelectronics.

Shift in Revenue Mix

An interesting shift was noted in the company’s Q1 revenue mix. Sales to the RF (radio frequency) market strengthened, particularly in Silicon Photonics (SiPho) and Silicon Germanium (SiGe) technologies, alongside growth in the power management components segment. Power management revenue grew from 10% of total sales in Q1 2024 to 18% in Q1 2025, while RF revenue rose from 14% to 22% over the same period. CEO Ellwanger projected that the RF market could double in size in 2025.

In response to developments in the power management market, Tower has begun entering a new segment: envelope tracking. This niche technology allows power supplies to continuously adjust voltage supplied to amplifiers, optimizing performance and energy efficiency. Following the earnings release on Wednesday, Tower’s stock rose by roughly 7% on Nasdaq, with the company now valued at approximately $4.7 billion.

Valens: Three Automotive Design Wins

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by: Roni Lifshitz, Editor

Valens Semiconductor (NYSE: VLN) has achieved three automotive design wins from leading European OEMs for its VA7000 MIPI A-PHY chipsets. The OEMs, which belong to a group of automotive brands, plan to embed Valens’ MIPI A-PHY chipsets in certain vehicle models with Start of Production (SoP) in 2026. The expected production volume may reach approximately 500,000 vehicles per year. Valens estimates that upon commercialization ramp up, the design wins will generate over $10 million dollars in annual revenue, for a period of 5-7 years.

Valens achieved these design wins in collaboration with leading Automotive Tier-1s on the camera side and on the System on Chip (SoC) side, both of which now offer native A-PHY support in their platforms. The selection of Valens chipsets follows intensive testing of a variety of connectivity solutions. Valens is a key contributor to the MIPI A-PHY standard, and offers the automotive industry a solution for sensor connectivity with immunity to electromagnetic noise.

The VA7000 chipsets was the first in the industry to implement the MIPI A-PHY standard for advanced driver-assistance systems (ADAS) and autonomous driving systems (ADS). MIPI A-PHY specifies in-vehicle high-speed data transmission over lightweight wiring harnesses for up to 15 meters, with adaptive noise cancellation and retransmission mechanisms to guarantee superior EMC/EMI performance. The VA7000 family has been designed to support the current and future gears of MIPI A-PHY – from 2Gbpps to 16Gbps as defined in version 1.0, and with a roadmap to 48Gbps and beyond as expected in future versions.

Valens’ second quarter 2024 revenues reached $13.6 million, compared to $24.2 million in the second quarter of 2023. Automotive revenues accounted for approximately 40% of total revenues at $5.5 million, compared to $8.7 million in the second quarter of 2023, due to lower demand from Mercedes-Benz. The company expects third quarter revenues to be between $14.7 million to $15.4 million.