Avnet ASIC to Manage Production of RAAAM Memory Technology at TSMC

28 June, 2026

The Israeli-Swiss startup's embedded GCRAM memory technology aims to replace SRAM in processors. Avnet ASIC will support production qualification on TSMC's 2nm process

Israeli startup RAAAM Memory Technologies has selected Avnet ASIC Israel to manage the manufacturing of its proprietary Gain-Cell Random Access Memory (GCRAM) technology, which is designed to address one of the biggest bottlenecks in modern processors: embedded SRAM memory.

Under the agreement, Avnet ASIC will serve as the Value Chain Aggregator (VCA) for production on TSMC’s 2nm process technology. The company will be responsible for adapting RAAAM’s design to TSMC’s manufacturing flow, while also providing engineering support, production management and process integration.

Avnet ASIC is an ASIC and SoC design and manufacturing center operating as a business unit of Avnet Silica, which is part of global distributor Avnet. Established about 35 years ago, the company has completed hundreds of semiconductor projects in Israel and abroad. It holds TSMC’s official VCA certification, has extensive experience with 3nm technologies and early access to the foundry’s upcoming 2nm manufacturing platform.

The companies said RAAAM’s technology is currently undergoing qualification and has already been integrated into a customer test chip that completed tape-out in March 2026.

RAAAM’s GCRAM is an embedded memory technology intended to replace the SRAM blocks currently integrated into processors. Because fetching data from external memory is roughly 100 times slower than transferring data within the chip, processors rely on large on-chip SRAM caches to store frequently accessed information. However, SRAM consumes a significant amount of silicon area—sometimes accounting for nearly half of the die.

According to RAAAM, conventional SRAM is becoming increasingly difficult to scale for future semiconductor nodes. The company says GCRAM can reduce silicon area by approximately 50% while lowering memory power consumption by as much as 10x, all while remaining compatible with standard CMOS manufacturing processes.

An Israeli-Swiss collaboration

RAAAM was founded in 2021 by four VLSI researchers from Bar-Ilan University and the École Polytechnique Fédérale de Lausanne (EPFL) in Switzerland. The company has received support from the European Union, the Intel Ignite startup accelerator and private investors, including NXP.

The company’s technology is based on a three-transistor gain-cell memory architecture, compared with the six-transistor cells used in conventional SRAM. The approach occupies a middle ground between SRAM, which requires no refresh, and DRAM, which relies on periodic refresh cycles. GCRAM also performs periodic refresh, but at a much lower frequency than DRAM and transparently to the surrounding circuitry.

RAAAM says its memory operates at supply voltages as low as 450mV in FinFET processes, is manufactured using a standard CMOS flow and features separate read and write ports. For modern processors running edge AI workloads and complex algorithms, this could enable twice the on-chip memory capacity within the same silicon area while significantly reducing power consumption.

The company is competing in the emerging embedded-memory market alongside firms such as Weebit Nano, whose embedded ReRAM technology also aims to provide an alternative to conventional SRAM in future semiconductor designs.

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Posted in: News

Posted in tags: Avnet ASIC , RAAAM , SRAM , TSMC

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