SRAM

Avnet ASIC to Manage Production of RAAAM Memory Technology at TSMC

Posted on by Techtime

Israeli startup RAAAM Memory Technologies has selected Avnet ASIC Israel to manage the manufacturing of its proprietary Gain-Cell Random Access Memory (GCRAM) technology, which is designed to address one of the biggest bottlenecks in modern processors: embedded SRAM memory.

Under the agreement, Avnet ASIC will serve as the Value Chain Aggregator (VCA) for production on TSMC’s 2nm process technology. The company will be responsible for adapting RAAAM’s design to TSMC’s manufacturing flow, while also providing engineering support, production management and process integration.

Avnet ASIC is an ASIC and SoC design and manufacturing center operating as a business unit of Avnet Silica, which is part of global distributor Avnet. Established about 35 years ago, the company has completed hundreds of semiconductor projects in Israel and abroad. It holds TSMC’s official VCA certification, has extensive experience with 3nm technologies and early access to the foundry’s upcoming 2nm manufacturing platform.

The companies said RAAAM’s technology is currently undergoing qualification and has already been integrated into a customer test chip that completed tape-out in March 2026.

RAAAM’s GCRAM is an embedded memory technology intended to replace the SRAM blocks currently integrated into processors. Because fetching data from external memory is roughly 100 times slower than transferring data within the chip, processors rely on large on-chip SRAM caches to store frequently accessed information. However, SRAM consumes a significant amount of silicon area—sometimes accounting for nearly half of the die.

According to RAAAM, conventional SRAM is becoming increasingly difficult to scale for future semiconductor nodes. The company says GCRAM can reduce silicon area by approximately 50% while lowering memory power consumption by as much as 10x, all while remaining compatible with standard CMOS manufacturing processes.

An Israeli-Swiss collaboration

RAAAM was founded in 2021 by four VLSI researchers from Bar-Ilan University and the École Polytechnique Fédérale de Lausanne (EPFL) in Switzerland. The company has received support from the European Union, the Intel Ignite startup accelerator and private investors, including NXP.

The company’s technology is based on a three-transistor gain-cell memory architecture, compared with the six-transistor cells used in conventional SRAM. The approach occupies a middle ground between SRAM, which requires no refresh, and DRAM, which relies on periodic refresh cycles. GCRAM also performs periodic refresh, but at a much lower frequency than DRAM and transparently to the surrounding circuitry.

RAAAM says its memory operates at supply voltages as low as 450mV in FinFET processes, is manufactured using a standard CMOS flow and features separate read and write ports. For modern processors running edge AI workloads and complex algorithms, this could enable twice the on-chip memory capacity within the same silicon area while significantly reducing power consumption.

The company is competing in the emerging embedded-memory market alongside firms such as Weebit Nano, whose embedded ReRAM technology also aims to provide an alternative to conventional SRAM in future semiconductor designs.

RAAAM aims to extend Moore’s Law to memory: moving toward 2nm qualification at TSMC

Posted on by Techtime

[In the photo above: RAAAM management team (left to right): Adam Teman, Eli Lizerovitz, Robert Gitterman, Alex Fish, and Eran Rotem. Photo: Omer Cohen]

RAAAM Memory Technologies, an Israeli–Swiss semiconductor startup, is entering a critical stage in the commercialization of its on-chip memory technology, GCRAM, following the completion of a $17.5 million Series A round led by NXP Semiconductors. CEO and co-founder Dr. Robert Gitterman says the new funding will support the qualification of a 256-MB test chip in TSMC’s 2-nanometer process — the final step before mass production.

“Our technology has already been proven on silicon,” Gitterman told Techtime. “We’re now fabricating the 2 nm qualification chip, which will undergo a series of stringent tests. Once we pass qualification, any company designing chips in this process — including Apple, NVIDIA, and others — will be able to integrate our memory as a drop-in SRAM replacement.”

The memory bottleneck

According to Gitterman, roughly 50 percent of every digital chip’s area is devoted to memory, mostly SRAM. While processors continue to scale with each generation, SRAM has reached the physical limits of miniaturization in advanced CMOS nodes below 5 nm. “Moore’s Law has stopped at memory,” he says. “SRAM has become the bottleneck of the AI era. Once it runs out of space, designers have to move to external memories like HBM — which are slower and far more power-hungry.”

The surge in memory demand for AI accelerators, autonomous vehicles, and edge devices has created a pressing need for denser, more efficient on-chip memory. RAAAM’s GCRAM targets exactly that: a seamless SRAM replacement suitable for CPUs, GPUs, and low-power SoCs alike.

Three transistors and a smart refresh

RAAAM’s innovation lies not in exotic materials or transistor geometry, but in circuit-level architecture. Each GCRAM cell uses three transistors instead of six, relying on charge-retention capacitive storage with a background refresh mechanism.
“The real breakthrough is in the refresh logic we developed,” Gitterman explains. “It operates in the background without interfering with system performance. This lets us maintain high speed while solving the yield problems that plague advanced SRAM.”

The company has demonstrated GCRAM across multiple foundry nodes — from 180 nm down to 5 nm FinFET — achieving 2× density and 10× lower power than conventional SRAM, all while remaining fully compatible with standard CMOS flows.

From academic research to commercialization

Founded in 2021 by four researchers — Dr. Robert Gitterman, Prof. Andreas Burg, Prof. Alexander Fish, and Prof. Adam Teman — RAAAM grew out of nearly a decade of collaborative research between Bar-Ilan University and EPFL Switzerland.
“None of us had prior startup experience,” Gitterman recalls. “We had to learn how to build a company from scratch. But the timing was perfect — the industry was hungry for new memory solutions, and our technology was ready.”

He admits the shift from academia to semiconductors was a reality check. “In academia you have time. In this industry, you have to move at the pace of process generations — sometimes every year. If you don’t keep up, you’re out of the game.”

Strategic backing from NXP

NXP, which led the Series A, has been working with RAAAM for several years and views GCRAM as a strategic technology. “RAAAM’s solution directly addresses one of the most critical challenges in advanced chip design,” said Victor Wang, VP of Front-End Innovation at NXP. “We’ve seen its potential firsthand.”

Alongside NXP, RAAAM is also collaborating with a major networking-chip manufacturer and with GlobalFoundries on additional process integrations.

The company currently employs 22 people, operating from Petah Tikva and Lausanne. Gitterman describes the new funding as “the first major step toward full commercialization” and a sign that the semiconductor industry is again open to genuine innovation.
If RAAAM’s qualification succeeds, its memory could soon find its way into the processors powering the next generation of artificial intelligence.