Hailo Prepares for Mass Production of its AI Chips

Photo above: A development team at Hailo. The Tel Aviv based company employs around 65 workers today

Tel Aviv-based Hailo is preparing for the mass production of its AI chip that meets the ASIL-B standard of the automotive industry, and start full-scale production during 2020.  Company co-founder and CEO Orr Danon told Techtime that the new chip is named Hailo-8 and was developed as part of the cooperation between Hailo and auto manufacturers. The chip enables the meeting of demands for critical life-saving systems, including the meeting of working under conditions of up to 105 degrees Celsius.

According to company data, the Hailo-8 processor reaches up to 26 tera operations per second (TOPS) and 3 TOPS per Watt power efficiency. It will meet the strict ISO 26262 ASIL-B as well as the AEC Q 100 Grade 2 standards. Hailo-8 is comprised of four main components: an Image Signal Processor that improves the image from the sensor before its transfer for processing by the neural network core, an H.264 encoder that handles the video stream, an ARM-M4 processor that manages the chip, and the neural network core itself, that is comprised of a flexible matrix of software-configurable processing, controls, computational resources and memory units.

Renew the Old Idea of DFP Processors

Hailo was established in February 2017 by CEO Orr Danon, CTO Avi Baum and the Business Development Manager Hadar Zeitlin. The first investor in the company was Zohar Zisapel, who serves today as Chairman of the board. To date Hailo has raised around $24 million, of which $21 million was in the latest round of financing which was completed in January 2019. The company developed a new architecture for AI chips for edge devices that carry out the execution phase – i.e.  the application of the inference of a neural network in edge devices at a rapid speed and with a huge saving in energy.  According to Danon, the architecture, which is protected by dozens of pending patents, “belongs to a forgotten family of processors from the Data Flow Processors type.”

CEO Orr Danon. “Our architecture describes the structure of a neural network"
CEO Orr Danon. “Our architecture describes the structure of a neural network”

In DFP processors, the processing activity takes place only when data is fed into the processor, which conducts a fixed series of operations on top of this information, and then transfers the processed information. “In recent years, it turned out that the reliance on neural networks is an efficient and reliable means of solving many problems, and therefore most of the AI systems that we see in the market are based on neural networks. Here the challenge is structural, since the chip needs to implement a structure of a neural network. In a neural network one infuses experience into the description of a structure, and therefore it is a very efficient solution in solving problems which are based on recognizing examples.”

How is your chip designed? What are the main principles of the architecture?

Danon: “Our architecture describes the structure of the neural network and allocates resources to every layer in the network. We identified that in during the processing of inference, there were differences in the behavior of the various layers of the neural network, and therefore there was a need to provide them with different resources. This runs counter to our competitors, who use solutions such as GPU processors that allocate to each and every layer the same level of resources. Our development software learns the specific problem, characterizes it, and knows how to transfer to the chip instructions on how to manage the resources of each layer in an optimal method.”

What are the components of the chip?

“The idea is to use the memory units that are located very close to the processing units. We allocate memory and processing units in accordance with every task, and in this way achieve very fast processing, and extensive savings in the chip’s power consumption.  This allows us to meet the extremely strict standards of the automotive industry, since the chip does not heat up and is capable of operating in the environmental temperatures that the industry demands.”

You claim that your chip is more efficient that other solutions in the market. However, there is no universally accepted means of measuring AI chips.

“We measure the performance of our chips by checking how many operations per Watt we execute a specific neural network. Nowadays there is the MLPerf consortium that is attempting to define a benchmark which will serve as a basis for comparing different deep learning processors. Regarding edge devices, the industry is apparently going in the direction of measuring the number of operations per Watt (TOPS/W) that the neural network carries out for a specific task, like an image.”

Today new methods are being developed for deceiving neural networks.  How are you dealing with this problem?

“It is possible to relate to AI deception as a weakness, just as one relates to security vulnerabilities. At the outset, the weaknesses of the software systems surprised the industry, but gradually they found solutions. In the AI field, first of all this is a conceptual problem that lacks a solution on the silicon level. However, if the network was trained in the wrong way, and the attacker is aware of how the network was trained, then he is capable planning an attack. We also deal with this problem, and in principle it shows the advantage of installing AI systems at the edges of the network, since in this way there are less vulnerabilities along the route of transferring information.“

Hailo is growing quickly, and currently employs around 65 workers. The company is in the process of hiring additional manpower. Hailo is focusing its efforts on two key markets: the automotive and IoT. These two markets are expected to be huge and are also very demanding as in both there is a need for a product which is very reliable, low-cost, with very low power consumption. Danon: “In many respects the camera in a vehicle is no different than the IoT camera in a smart city. These are two areas that will be very dominant, and they share many common requirements.”

TowerJazz to Invest $100 Million in Capacity Building

TowerJazz announced a capacity expansion plan for the Uozu fab in Japan, with total investments of approximately $100 million. The company will add capacity for the 300mm RF SOI process, the 65nm BCD Power Management and the CMOS image sensor platforms. Capacity is targeted to be installed during the first half of 2020. Russell Ellwanger, Chief Executive Officer of TowerJazz, explained: “Our 300mm activities have resulted in strong demand and forecasted excess demand for which we are now investing to fulfill.”

During second quarter of 2019 (ended June 30, 2019),  revenues had reached $306 million, reflecting 11% quarter over quarter organic growth (defined as total revenue excluding revenues from Panasonic in the TPSCo fabs and revenues from Maxim in the San Antonio fab). This organic growth of $20 million is offsetting to a great extent the $22 million Panasonic revenue reduction per the revised terms of the contract and a Maxim revenue reduction per the San Antonio fab acquisition agreement.

TowerJazz expects revenues for the third quarter of 2019 to grow to approximately $312 million. Revenues for 2018 were $1.3 billion compared to $1.39 billion in 2017. TowerJazz is a manufacturing services provider of integrated circuits (ICs). Its technology is comprised of SiGe, BiCMOS, mixed-signal/CMOS, RF CMOS, CMOS image sensor, integrated power management (BCD and 700V), and MEMS. TowerJazz operates two manufacturing facilities in Israel (150mm and 200mm), two in the U.S. (200mm) and three facilities in Japan (two 200mm and one 300mm).

GlobalFoundreis aborts 7nm Development

Photo above: GlobalFoundries’ Fab-1 in Dresden, Germany

The second largest semiconductor’s foundry (The first is TSMC), GlobalFoundries, announced a departure from the race to achieve smaller transistor nodes.  The company said it is putting its 7nm FinFET program on hold indefinitely and restructuring its research and development teams to support its enhanced portfolio initiatives. Mainly shifting the development resources to make its 14/12nm FinFET platform more relevant to the clients, and to add innovative IP and features including RF, embedded memory, low power and more. “This will require a workforce reduction, however a significant number of top technologists will be redeployed on 14/12nm FinFET derivatives and other differentiated offerings.”

The newly appointed CEO of GlobalFoundries, Tom Caulfield, mentioned that the demand for semiconductors has never been higher. But, “The vast majority of today’s fabless customers are looking to get more value out of each technology generation to leverage the substantial investments required to design into each technology node. This industry dynamic has resulted in fewer fabless clients designing into the outer limits of Moore’s Law.”

The ASIC Business will be Independent Company

saicIn addition, GF is establishing its ASIC business as a wholly-owned subsidiary, independent from the foundry business. This independent ASIC entity will provide clients with access to alternative foundry options at 7nm and beyond, while allowing the ASIC business to engage with a broader set of clients, especially the growing number of systems companies that need ASIC capabilities and more manufacturing scale than GF can provide alone.

“Lifting the burden of investing at the leading edge will allow GF to make more targeted investments in technologies that really matter to the majority of chip designers in fast-growing markets such as RF, IoT, 5G, industrial and automotive,” said Samuel Wang, research vice president at Gartner. “While the leading edge gets most of the headlines, fewer customers can afford the transition to 7nm and finer geometries. 14nm and above technologies will continue to be the important demand driver for the foundry business for many years to come.”